Department of Computer Science 
CS 220 - Computer Organization

COURSE OBJECTIVES:

This course explores the question, "How does a computer work?"  We study both the principles and the details of how a computer carries out the tasks required by programs written in Java and other high-level programming languages. We focus on two key levels of computer organization, known as the machine language level and the logic design level. The machine language level has a small set of instructions for storing and manipulating information that are directly executable by the computer. The logic design level defines the specific gate and circuit configurations that are needed for computers to give meaning to those machine level instructions.

Topics include addressing, memory, the fetch/execute cycle, RISC and CISC architectures, pipelining, parallel architectures, logic circuits, and computer arithmetic. The relation between machine language programs and Java programs, with which you are already familiar, will motivate much of this study. Examples will be drawn from modern computer architectures, such as the Intel Pentium and the Java Virtual Machine (JVM).

TEXT (required):

Tanenbaum, A., Structured Computer Organization, 4th Edition, Prentice-Hall, 1999, and handouts (JVM architecture and LogicWorks tutorial)

INSTRUCTOR:

Allen Tucker, 220 Searles Hall

Email address: allen@bowdoin.edu

Office Hours: TWTh 4:00-5:00, or by arrangement

COURSE INFORMATION:

Class meetings: MWF 9:30am -- Searles 126

     (some of these meetings will be in Searles 128 for lab work)

Course Web address: www.bowdoin.edu/~allen/courses/cs220/syllabus.html

Course group e-mail address: csci220@bowdoin.edu

COURSE OUTLINE:

Week of      Topics                             Readings                Work Due

Sept 1       Overview of computer organization  Chapter 1   
                                           
Sept 8, 15   Computer systems: processors,      Ch 2, 9.1.2, Appx A     Lab 1
             memory, input/output               (skip 2.3.6-2.3.10, 2.4.4-2.4.5)
                  
Sept 22, 29  The digital logic level:           Ch 3, 9.1.3, handout    Lab 2, Lab 3
             circuits, latches, arithmetic      (skip 3.5.1-2, 3.6.2-3, 3.7)                             

Oct 6        Memory: latches, registers, chips                          Lab 4
             CPU: chips, bus operations                                 test #1   

Oct 13, 20    The microarchitecture level:       4.1-4.3, 9.1.4, handout Lab 5
             data paths, registers, bus,                                
             IJVM and the Mic-1
Oct 27                                                                  Lab 6
         
Nov 3       Instruction set architecture       5.1 (except 5.1.5-6)    test #2                                               9.1.5

Nov 10, 17           
Nov 24       Performance: prefetching,          4.4.1-4, 4.5.1-2        Lab 7      
(1/2 week)   pipelining and cache memory           


Dec 1, 8     ISA data types, instruction        5.2-5.7 (skip Pentium   Lab 8   
             formats, addressing, control       and UltraSparc sections), 
                                                Appx B                                 

Dec 15       final exam period (check exam schedule)                   test #3

Each lab will be posted on the course Web site shown above; you should print and read it over at the beginning of the week it is assigned. We will sometimes hold class meetings in Searles 128 to preview the lab assignments. You may choose to work individually or in teams of two on the laboratory programming and logic design experiments. The written answers to all questions on the labs should, however, be done individually.

In addition to the labs, there will be two open-book in-class tests during the semester and a third test during final exam period. All lab work, class participation, and test results will contribute to your course grade. You are expected to follow Bowdoin's Computer Use Policy as well as the Academic Honor Code while completing all work for this course.