Preview of the "Full Laboratory Companion"

The Full Laboratory Companion is written as a supplement and complement to the "V. C. Hamacher, Z. G. Vranesic and S. G. Zaky" book Computer Organization. It is intended to provide the "hands-on" experience needed to complete a course based on the HVZ book. The "Full Companion" takes the concepts introduced in the "Short Companion" further, and provides greater detail. It brings out the full sophistication available with current microprocessor development tools. This should enable students to develop the skills necessary in industry to make full advantage of the toolsets such as provided by Software Development Systems.

The different backgrounds of the Hamacher, Vranesic, Zaky and the author help to bring out the practical differences and similarities of RISC and CISC processors. In this "Companion", a series of exercises using the SDS starter kits, in conjunction with several virtual hardware I/O devices developed by the author, give practical experience with both PowerPC and 68K processors.

The Full Laboratory Companion is under development. Certain portions are already included with the Short Companion diskette, It is planned that, when completed, the Full Laboratory Companion will be available as booklet and WEB pages (on a CD). This format means that working (and non-working) code examples can be downloaded directly into a working directory. A series of doit.bat files to help the student to quickly overcome the initial learning curve associated with the SDS tool set. This toolset includes assembler, compiler, linker and a graphical based processor simulator.


An introduction to using the SDS toolset

The first section of the "Full Laboratory Companion" shows how to install the SDS software under both Windows 3.1.1 and Windows 95.

The first laboratory experiment is a worked exercise from HVZ which demonstrates how to build, assemble and link source files so that they can be run on the SDS microprocessor simulators.

Basics of a software engineering process for assembly language programming are introduced. For example, the author suggests using the high level "C/C++" syntax as documentation for the assembly language code being developed. This serves two purposes

Exercises (complete and nearly complete) can be downloaded directly into the student's working directory. The code is available both in a format that closely follows the HVZ syntax and with the more expansive "SE" approach. The ability to download example source and "doit" files helps to overcome the initial learning curve associated with the sophisticated SDS microprocessor tool kits.

The second task is the handling of arrays. The student is shown the relationship between various high language programming constructs (for-loops etc.) and their assembly language equivalents. This task brings out the differences (and problems) in the low level programming operations of the PowerPC and 68K families of processors because of their RISC and CISC architectural characteristics.

The second laboratory experiment makes use of a Virtual Hardware (I/O) Device" (COFFEEPOT) to provide the student with the experience (and problems) of controlling a "real hardware device". Further capabilities of the SDS tool-kit are explored.


Training on more sophisticated "virtual devices"

The third laboratory experiment makes use of a more sophisticated Virtual Hardware (I/O) Device which has more characteristics of a "real" device. For example the "TRAIN" device is not always ready for input/output (I/O) operations. Programming techniques associated with logical (bit-wise) instructions on both PowerPC and M68K processors are detailed.

By the time students have completed all the exercises in this "Companion", they should feel comfortable in projects that combine both high level and low level programming languages. In Task 5, students are introduced to the coding conventions needed to link assembly and "C/C++" routines. A comparison is made of the performance characteristics of RISC (PowerPC) and CISC (68K) processors. These ideas are extended in Laboratory 4 which uses the SDS simulators to make timing comparisons on a number of basic coding benchmarks.

Laboratory 5 extends these ideas using a "virtual device" that allows the student to demonstrate basic animation techniques using a multi-frame buffer "JUMBO-TRON TV" virtual device. A combination of short "C/C++" and assembly language routines is required during this experience.

This laboratory allows students full range of their imagination, and their ability to demonstrate their capability of handling a "device" which has the "real-life" capability of destroying itself if mistreated.


Interrupts and other advanced exercises

Task 7 discusses the characteristics of "Interrupt Handling" on the PowerPC (RISC) and 68K (CISC) processor architectures. Laboratory 6 uses the SDS simulator to demonstrate the interrupt concepts.


Stand-alone Evaluation boards and future "virtual devices"

The "Full Laboratory Companion" offers a full range of experiments. These can be done using either the SDS software simulators or with commercial "stand-alone" evaluation boards using "real" hardware. These experiments provide students with hands-on experience and complement the knowledge introduced by V. C. Hamacher, Z. G. Vranesic and S. G. Zaky in their book "Computer Organization".

To avoid the "road-mapping" that can easily creep into a laboratory based course, the author plans to release a series of new "Virtual Devices each year in response to suggestions of instructors using the HVZ book. It is anticipated that these devices will be "net-accessible".



Last modified: July 07, 1996 10:06 PM
by M. Smith Copyright -- M. R. Smith