Applying the WIDFI process to generate the PowerPC source file

The When In Doubt, Fake It process requires that you assume that coding on the PowerPC will be "exactly like doing it on the 68K processor, except where it will be completely different". The similarities are associated with doing the same task, the differences are associated with the different processor architectures.

Expect a lot of "near-misses" when you have the code nearly right and have to play around trying to understand, and then fix, some minor difference. Major problems are easy to fix as you can spot them. It's the minor ones that take the hours, as you don't always realize that there is a problem.


Differences in the capabilities of the Version 6.5 SDS 68K and PowerPC demo kits

One of the major differences between the SDS 68K and SDS PowerPC demo kits is a business one. SDS developed the editor, compiler, assembler, linker and simulator for the 68K. They only developed the editor and simulator for the PowerPC, purchasing the remainder from a third party, Diab Data Inc. This makes decisions about releasing a "demo-kit" a more difficult process.

It turned out that there was nothing seriously missing from the PowerPC demo-kit. It's just that, where in the full kit there would be 3 ways of doing something, 2 of the methods where deactivated. This would be frustrating enough in an industrial situation that people would use the kit, like it, want more and have to buy the full tool-set, just as SDS wants.

For us, we can work around the deactivation problems for the exercises we need to do. We don't need every feature under the sun, just enough. For example, with the PowerPC assembler, I had to built a file with every assembly language directive listed in the Diab Data assembler manual and try to see what worked and what did not. You can see what I found in the file "active.s". Use this file as a resource when you are developing your own PowerPC code.

Note:- It is possible, but unlikely, that if you activate the assembler using a different PowerPC processor version number than I have suggested that the assembler options that are active may change.


Applying the WIDFI process

Prior knowledge or not. This section of the "Companion" will cover using the PowerPC processor assuming that you have already tackled Laboratory 1 using the 68K processor with the SDS simulator. If you have not covered that Laboratory, you should read the more detailed explanation of Laboratory 1 using the PowerPC.

  1. Develop an initial source code file that makes use of the software engineering and SDS simulator knowledge experience we have gained performing Laboratory 1 on the 68K processor.
  2. Modify the 68K source file to look like that needed if a LOAD/STORE architecture version of 68K processor existed. This software approach is effectively what happens in the hardware of the more recent CISC processors, such as the Intel Pentium, and the equivalent AMD K6, processor. On those chips each CISC instruction is broken up, internally to the processor, and executed as a series of simple RISC instructions.
  3. Do a direct translation into PowerPC syntax for each 68K instruction.While applying the WIDFI process, it is advisable to do occasional tests to see if the DIAB DATA assembler is correctly handling what you are trying to do. Remember its limitations.
  4. Bring in some other knowledge of syntax from other RISC assemblers to generate the final source code file.
  5. Activate the DIAB DATA assembler das.
  6. Check how to link the program code and data into specific memory locations by looking at the SDS tutorial code examples.
  7. Assume that using the PowerPC simulator for

    is similiar to running the SDS 68K simulator



Last modified: July 22, 1996 12:31 PM by M. Smith Copyright -- M. R. Smith